1. Field of Invention
This invention relates to integrated circuits and in particular to trimming transistors in analog circuits.
2. Description of Related Art
As analog integrated circuits are created with sub-micron technology it is becoming more and more difficult to trim pairs of transistors that form a differential circuit or other critical configurations. Conventional trimming is done by laser trimming resistors in the circuit or by adding an EEPROM. A means is needed to adjust offset voltages or threshold voltages without requiring a resistive device which is becoming quite small to be trimmed.
In U.S. Pat. No. 5,808,272 (Sun et al.) is shown a laser system and processing method for functionally trimming semiconductor devices without inducing performance drift or malfunction including spurious optoelectric response in adjacent circuitry. In U.S. Pat. No. 5,587,665 (Jiang) a method using a special test circuit tests performance degradation resulting from hot carrier stress. In US U.S. Pat. No. 4,182,024 (Cometta) a pulsed laser is used to trim transistors in a combined bipolar and junction field effect integrated circuit to achieve a balanced circuit performance.
As semiconductor geometry""s shrink and trimming offset voltages becomes more difficult, methods other than laser trimming become important. These methods can take the form of altering transistor characteristics rather than laser trimming resistors to achieve an offset that is within specification. By doing this the geometry""s are not affected and extra space is not allocated to product trimmings.
In this invention a method is described to trim the offset voltage of an analog differential transistor pair. The method described can be used for other circuits where an offset or threshold voltage needs to be adjusted to bring the particular circuit into specification. In the circuit example used to demonstrate the method of this invention, a differential amplifier is connected between Vdd and circuit ground. External contact pads are connected to each terminal of the two transistors in the differential amplifier. The size of the pads are dependent upon the method of electrical contact and are larger when mechanical probes are used than when an electronic beam is used.
The differential amplifier is powered on with inputs connected together, and the offset of the transistor pair is measured. If an offset in excess of a specification is measured, one of the transistors are trimmed. The trimming is done to the selected transistor by hot carrier stressing that transistor for a period of time to cause permanent damage to the transistor in the form of interface state generation. This changes the threshold voltage of the transistor and the corresponding offset voltage of the differential transistor pair. The rate of offset voltage reduction is noted with respect to the amount of stress time, and additional stress is projected based upon the previous changes in offset voltage. The process is repeated until the offset voltage is within specifications.
Other high voltage stress like Fowler-Nordheim tunneling can be used to produce permanent damage to the transistor being trimmed and change the transistors threshold voltage. In addition to a differential transistor pair circuit, other circuits can be trimmed using the method of this invention to adjust the threshold voltage of a transistor to bring the actual characteristics of a circuit within specification.